1. Field
This invention relates to an instruction check program, an instruction check apparatus, and an I/O simulator that perform an operation simulation of a microcomputer including a processor core and an input and output function section (hereinafter, referred to as “I/O area”) for controlling peripheral circuits by a control signal outputted from the processor core.
2. Description of Related Art
Conventionally, when a microcomputer, such as a CPU (central processing unit) or a DSP (digital signal processor), is incorporated in an apparatus and a piece of software desired by the user is executed, an operation verification using a simulator is performed before the microcomputer is mounted. When a bug occurs in the execution of the software by this operation verification, a debugging processing is performed to correct the part of the bug.
The debugging processing includes hardware debugging for correcting a defect of the hardware itself of the processor and software debugging for correcting a defect of the software executed by the processor. An example of a software debugging system is a method using a CPU and storage means for debugging.
In Japanese Laid-Open Patent Application No. 2004-220089, it is described that the CPU's access to a storage area where the storage means is disposed is verified by the software debugging.